1. Field of the Invention
The present invention generally relates to semiconductor processing technologies and, more particularly, to a versatile wafer carrier.
2. Description of the Related Art
Conventional semiconductor devices generally include a semiconductor substrate, usually a silicon substrate, and a plurality of sequentially formed dielectric interlayers such as silicon dioxide and conductive paths or interconnects made of conductive materials. The interconnects are usually formed by filling a conductive material in trenches etched into the dielectric interlayers. In an integrated circuit, multiple levels of interconnect networks laterally extend with respect to the substrate surface. The interconnects formed in different layers can be electrically connected using vias or contacts. A conductive material filling process of such features, i.e., via openings, trenches, pads or contacts can be carried out by depositing a conductive material over the substrate including such features.
Copper and copper alloys have recently received considerable attention as interconnect materials because of their superior electromigration and low resistivity characteristics. The preferred method of copper deposition is electrodeposition. During fabrication, copper or another conductive material is deposited on a substrate that has been previously coated with a conductor, typically a barrier layer and then a seed layer. Typical seed layers are made of copper and its alloys. Typical barrier materials generally include tungsten, tantalum, titanium, their alloys, and their nitrides. The deposition process can be carried out using a variety of processes.
After depositing copper into the features on the semiconductor wafer surface, a removal process, such as an etching, an electro polishing or a chemical mechanical polishing (CMP) step, may be employed. Such removal processes remove the conductive materials off the surface of the wafer, particularly the field regions, thereby leaving the conductive materials primarily disposed within the features, such as vias, trenches and the like.
During the deposition process or the removal process the wafer is generally held by a carrier head. As shown in FIG. 1A, a conventional carrier head 10 having a rotatable shaft 12 holds a wafer 14 during the electrodeposition process. The wafer 14 is placed on a surface 16 of a carrier base 18 (chuck) of the carrier head 10. During the deposition and/or material removal step, the carrier head 10 secures the wafer 14 to the surface 16 of the base 18 of the carrier head 10 by applying vacuum to the back of the wafer and using clamps 20. The vacuum is applied using vacuum lines 22 extending through the carrier base 18 and the body of the carrier head 10. Clamps 20 may also seal electrical contacts 24 to the wafer 14. In such a conventional carrier head, because of the clamp around the periphery of the wafer, no deposition or material removal occurs at the edge of the wafer.
In use, the carrier head is immersed into a solution, typically an electrolyte in a deposition and certain material removal processes, or a slurry in a CMP material removal process, for example. In processes where moveable contact with a pad is desired, such as for polishing, such a pad will be included. During any such process, it is important to prevent leakage of the solution to the backside of the wafer. Such leakages to the backside of the wafer contaminate the wafer backside and the electrical contacts. Removal of contaminants from the wafer backside requires an extra process step that is time consuming and increases manufacturing costs.
Another conventional wafer carrier design does not use vacuum suction on the back of the wafer to retain the wafer on the carrier and attempts to reduce contamination of the wafer backside and wafer edge during processing. Referring to FIG. 1B, with such a wafer carrier 28, the back surface 30 of the wafer 32 is pressed against an o-ring 34 to form a seal between the back surface 30 of the wafer and the o-ring 34. Also, a clamp 36 including a seal 38 seals a perimeter of the front surface 40 of the wafer 32 while housing the plurality of contacts 42 to the front surface 40. In this prior art system, a region 44 behind the seal can be pressurized with gas to further prevent contamination at the wafer backside. In such designs, because of the clamp around the periphery of the wafer, no deposition or material removal occurs at the edge of the wafer.
Yet another conventional CMP head is similar to the head shown in FIG. 1A, but it holds the wafer from the back side by vacuum when positioning the wafer for processing and from the circumference of the wafer by a retaining ring during processing, thereby fully exposing the front surface of the wafer. While the CMP process is done over the front surface of the wafer, the slurry from the CMP process can nevertheless migrate toward the back surface of the wafer.
To this end, there is a need for a wafer carrier design that that may be used throughout either one or more process steps and be able to seal back of the wafer from the process solutions. There is also a need for a wafer carrier design that seals back of the wafer from the process solutions while exposing the entire front surface of the wafer for processing without excluding processing at the edge of the wafer.